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As the workstation market moves form single processor to small-scale shared memory multiprocessors, it is very attractive to construct larger-scale multiprocessors by connecting symmetric multiprocessors (SMPs) with eecient commodity network interfaces such as Myrinet. Using a shared virtual memory (SVM) layer for this purpose preserves the shared memory programming abstraction across nodes. We explore the feasibility and performance implications of one such approach by comparing the performance of two SVM protocols on systems with uniprocessor and SMP nodes. AURC (Automatic Update Release Consistency) is a protocol developed for the SHRIMP multicomputer that takes advantage of the available Automatic Update hardware support. HLRC (Home-Based Lazy Release Consistency) is an all-software version of AURC. These protocols were demonstrated to achieve good performance and to outperform earlier all-software systems on conngurations with uniprocessor nodes. In this paper we use an architectural simulator and ten applications to investigate the potential of using SMP nodes. Through detailed simulations we nd that using SMPs improves performance for most of the applications, because of more sharing, eeective prefetching and lower synchronization costs. The protocols, however, exhibit diierent behavior for some applications. HLRC is in general more robust and predictable, whereas AURC exhibits more problems with contention due to the increased traac. 1 Introduction Recently, small-scale shared-memory SMPs have become increasingly widespread. Inexpensive SMPs based on Intel PC processors are on the market, and SMPs from other vendors are increasingly popular. Given this development, it is natural to examine whether the SVM mechanisms developed for uniprocessor nodes extend well to using an SMP as the base node, and how these mechanisms can be improved for this task. In this environment, the bus coherence protocol operates at cache line level within an SMP, and the higher-overhead SVM mechanism provides communication and coherence at page granularity across SMPs. Another view of